1. Field
Exemplary embodiments of the present invention relate to a non-volatile memory device and a fabrication method thereof, and more particularly, to a non-volatile memory device including a plurality of memory cells that are stacked perpendicularly to a substrate, and a method for fabricating the non-volatile memory device.
2. Description of the Related Art
Non-volatile memory devices retain data stored therein although power is turned off. Diverse non-volatile memory devices, such as NAND-type flash memory devices, are widely used.
As improvement in the integration degree of two-dimensional non-volatile memory devices where memory cells are formed in a single layer over a silicon substrate has come across technical limitation, a three-dimensional non-volatile memory device where a plurality of memory cells are stacked perpendicularly to a silicon substrate is introduced.
The non-volatile memory device includes a plurality of channels that are stretched in a perpendicular direction to the substrate, a plurality of gate electrode layers that are stacked along the channels and insulated from each other by inter-layer dielectric layers, and a memory layer that is interposed between the gate electrode layers and the channels to insulate the gate electrode layers and the channels from each other and stores charges. The memory layer may have a triple-layer structure which includes a charge blocking layer that is disposed on the side of the gate electrode layers, a tunnel insulation layer that is disposed on the side of the channels, and a charge storage layer that is interposed between the charge blocking layer and the tunnel insulation layer.
In order to form the channels expanded in the perpendicular direction and form the memory layer along the channels in the fabrication process of the three-dimensional non-volatile memory device, a Chemical Vapor Deposition (CVD) process or an Atomic Layer Deposition (ALD) process that has excellent step coverage is used. The CVD process or the ALD process, however, may cause defects on the interface between the channels and the tunnel insulation layer, thus deteriorating the electrical characteristics of the non-volatile memory device.
Also, since the channels have a shape of pillars that are stretched in the perpendicular direction and the gate electrode layers and the inter-layer dielectric layers surround the channels, it is impossible to perform an ion implantation process onto the channels to form source/drain regions, just as the conventional two-dimensional non-volatile memory devices are fabricated, and thus, there are some concerns such as the deteriorated interference between neighboring cells and the decreased cell current.